Circuit Design Checklist

Circuit Design Checklist #

Use this comprehensive checklist before running simulations to catch common errors and ensure reliable results.

Pre-Design Phase #

[ ] Requirements Defined #

Input voltage range specified
Output voltage/current requirements clear
Frequency range identified
Power budget established
Environmental conditions known (temperature, etc.)
Performance metrics defined (gain, bandwidth, etc.)

[ ] Research Completed #

Similar circuits reviewed
Component availability checked
Cost constraints considered
Design patterns identified
Potential issues anticipated

Component Placement #

[ ] Power Supply #

Voltage source(s) placed
Correct voltage values set
Ground symbol placed
Polarity verified
Source type appropriate (DC/AC/Transient)

[ ] Passive Components #

All resistors placed
Values use standard series (E12/E24)
Power ratings considered
Tolerances noted if critical
All capacitors placed
Correct capacitor types (ceramic/electrolytic)
Voltage ratings exceed circuit voltages
Polarity correct for electrolytics
All inductors placed (if any)
Realistic inductance values

[ ] Active Components #

Semiconductors correctly oriented
- Diode stripe/cathode marking verified
- BJT pin order: Collector, Base, Emitter
- MOSFET pin order: Drain, Gate, Source
Correct component types selected
- NPN vs PNP for BJT
- N-channel vs P-channel for FET
Appropriate models chosen
Substrate connections verified (MOSFET bulk)

[ ] Connections #

All components connected with wires
No floating nodes
No unintended shorts
Wire routing neat and clear
Critical nodes labeled

Circuit Verification #

[ ] DC Paths #

Every node has DC path to ground
No capacitor-only paths in bias networks
Current source have parallel DC paths
Floating nodes identified and fixed

[ ] Component Values #

All values realistic and achievable
No zero or infinite values
No extremely small/large values
Units verified (k vs m vs M)
Calculated values match placed values
Hand calculations performed for key parameters

[ ] Biasing (for amplifiers) #

DC operating point calculated
Transistor bias resistors present
Expected VBE ≈ 0.7V for BJT
Expected VCE between 0.1V and VCC-0.1V
Expected VGS > VTH for MOSFET
Expected VDS in saturation region

[ ] Signal Path #

Input clearly defined
Output clearly defined
Signal path continuous
AC coupling capacitors where needed
DC blocking verified
Impedance matching considered

Simulation Setup #

[ ] Probe Placement #

Input node probed
Output node probed
Critical intermediate nodes probed
Power supply currents measured (if needed)
Probe count within limits (2 for free, unlimited premium)

[ ] Analysis Type Selection #

DC Operating Point: for bias verification
Transient: for time-domain signals
AC Small-Signal (Premium): for frequency response
Analysis type matches circuit goal
Multiple analyses planned if needed

[ ] Analysis Parameters #

Transient:
- Time step appropriate (1/100 of fastest signal)
- Stop time captures behavior (5-10 time constants)
- Initial conditions set if needed
AC Analysis (Premium):
- Frequency range covers interest (0.1×fc to 10×fc)
- Points per decade sufficient (10-100)
- Source has AC magnitude set

Pre-Simulation Checks #

[ ] Design Review #

Circuit matches schematic/requirements
Component count reasonable
No obvious errors visible
Similar to working examples

[ ] Common Pitfalls Avoided #

No voltage source loops (add series R)
No current sources in series (add parallel R)
No ideal shorts or opens
No missing ground connections
No reversed diodes/transistors
No unrealistic component values
No blocking capacitors in bias paths

[ ] Expected Results Defined #

DC voltages estimated
AC gain calculated
Frequency response predicted
Time constants known
Sanity check values ready

Running Simulation #

[ ] Start Simple #

Run DC Operating Point first
Verify DC voltages before AC/transient
Check currents are reasonable
Transistors in correct region (active/saturation)

[ ] Progressive Complexity #

Simple analysis first
Add complexity incrementally
Verify at each step
Don’t skip validation

[ ] Monitor Warnings #

Read all warning messages
Understand each warning
Fix warnings before accepting results
Don’t ignore convergence issues

Results Verification #

[ ] Sanity Checks #

Results physically reasonable
No violation of laws (KCL, KVL, power)
Orders of magnitude correct
Signs correct (phase, polarity)

[ ] Comparison with Calculations #

DC voltages match hand calculations (±10%)
AC gain matches prediction
Time constants correct (τ = RC or L/R)
Cutoff frequencies as expected

[ ] Expected Behavior #

Amplifier: output larger than input
Filter: attenuation outside passband
Oscillator: sustained oscillation
Comparator: digital output
Power supply: regulated output

[ ] Error Analysis #

Results outside expectations investigated
Discrepancies explained
Model limitations understood
Assumptions verified

Documentation #

[ ] Circuit Documented #

File saved with descriptive name
Component values recorded
Design rationale noted
Calculation documented (separate file)

[ ] Results Recorded #

Key waveforms captured (screenshot)
Important values noted
Analysis settings documented
Anomalies documented

[ ] Design Decisions #

Component choices justified
Tradeoffs explained
Alternative considered
Future improvements noted

Advanced Checks (Premium/Complex Circuits) #

[ ] Sensitivity Analysis #

Critical components identified
Tolerance effects considered
Monte Carlo run (if premium)
Worst-case scenarios tested

[ ] Temperature Effects #

Temperature range considered
Coefficients set if known
Temperature sweep run (if premium)
Thermal stability verified

[ ] Frequency Effects #

Parasitic capacitances considered
High-frequency behavior verified
Transmission line effects (if >10MHz)
Stability margins checked

[ ] Power Analysis #

Component power dissipation calculated
Total power consumption noted
Power ratings verified
Heat dissipation considered

Common Mistake Prevention #

[ ] Avoided These Common Errors #

✓ Ground connected (not floating)
✓ Realistic component values
✓ Correct unit prefixes (k, M, m, μ)
✓ Diodes oriented correctly
✓ Transistor pins correct
✓ AC source for AC analysis
✓ Probes placed before running
✓ DC operating point verified first
✓ Simulation time window appropriate
✓ No blocking capacitors in bias
✓ Standard component values used
✓ Analysis type matches goal

See Common Mistakes Guide for details.

Pre-Flight Checklist (Quick Version) #

Use this abbreviated checklist before every simulation:

30-Second Check:

Power supply connected
Ground present
All components wired
Probes placed
DC operating point valid
Analysis type correct

If all checked: Run simulation!

If any unchecked: Review full checklist above.

Post-Simulation Actions #

[ ] Results Analysis #

All probes show data
Waveforms make sense
Values in expected ranges
No convergence warnings

[ ] If Results Good #

Save file
Export data if needed (Premium)
Document findings
Consider next steps

[ ] If Results Bad #

Review circuit connections
Check component values
Verify analysis settings
Consult Troubleshooting Guide
Simplify and retry
Ask community/support

Iterative Design Checklist #

[ ] First Iteration #

Basic circuit working
DC operating point correct
Basic function verified
Major bugs fixed

[ ] Second Iteration #

Component values optimized
Performance targets met
Edge cases tested
Stability verified

[ ] Final Iteration #

All requirements met
Tolerance analysis complete
Temperature effects verified
Design frozen
Documentation complete

Checklist for Different Circuit Types #

Amplifier Checklist #

DC bias correct (transistor in active region)
Input coupling capacitor (if needed)
Output coupling capacitor (if needed)
Emitter/source bypass capacitor (for gain)
Load resistance specified
Gain calculated and verified
Bandwidth measured
Input/output impedance known

Filter Checklist #

Cutoff frequency specified
Component values calculated (fc = 1/(2πRC))
Passband ripple acceptable
Stopband attenuation sufficient
Roll-off rate correct (-20dB/decade for 1st order)
AC analysis covers 0.01×fc to 100×fc
-3dB point verified

Oscillator Checklist #

Positive feedback path present
Loop gain > 1 at oscillation frequency
Phase shift = 0° or 360° at fosc
Amplitude limiting mechanism
Transient analysis shows startup
Frequency matches calculation
Waveform shape acceptable

Power Supply Checklist #

Input voltage range specified
Output voltage regulated
Load current capacity specified
Ripple voltage acceptable
Transient response tested
Short-circuit protection (if needed)
Over-voltage protection (if needed)
Efficiency calculated

Digital Logic Checklist #

Logic levels defined (high/low voltages)
Rise/fall times specified
Propagation delay measured
Fan-out capacity verified
Noise margins calculated
Timing diagrams captured
Glitches identified

Printable Quick Reference #

☐ Power connected & grounded
☐ All components wired
☐ Realistic values
☐ Correct orientations
☐ Probes placed
☐ DC operating point verified
☐ Analysis type correct
☐ Run simulation
☐ Results reasonable
☐ File saved